| Port Type | Name | Width (bits) | Description |
|---|---|---|---|
| master | INSTRUCTION | 32 | |
| master | DATA | 32 |
Detailed information about the SystemC TLM2 Fast Processor Model of the MIPS 24KEf core.
Processor IP owner is MIPS Technologies. More information is available from them here.
OVP Fast Processor Model is written in C.
Provides a C API for use in C based platforms.
Provides a native C++ interface for use in SystemC TLM2 platforms.
The model is written using the OVP VMI API that provides a Virtual Machine Interface that defines the behavior of the processor.
The VMI API makes a clear line between model and simulator allowing very good optimization and world class high speed performance.
The model has been run through an extensive QA and regression testing process.
Model Variant name: 24KEf
Description:
MIPS32 Configurable Processor Model
Licensing:
Open Source Apache 2.0
Limitations:
If this model is not part of your installation, then it is available for download from www.OVPworld.org/MIPSuser.
Verification:
Models have been validated correct as part of the MIPS Verified program and run through the MIPS AVP test programs
Features:
MIPS32 Instruction set implemented
MMU Type: Standard TLB
FPU implemented
L1 I and D cache model in either full or tag-only mode implemented (disabled by default)
Vectored interrupts implemented
MIPS16e ASE implemented
DSP ASE implemented
OVP simulator downloadable (needs registration and to be logged in) in package OVPsim for Windows32 and for Linux32
OVP Download page here.
OVP documentation that provides overview information on processor models is available OVP_Guide_To_Using_Processor_Models.pdf.
Full model specific documentation on the variant 24KEf is available OVP_Model_Specific_Information_mips32_24KEf.pdf.
Location: The Fast Processor Model source and object file is found in the installation VLNV tree: mips.ovpworld.org/processor/mips32/1.0
Processor Endian-ness: This model can be set to either endian-ness (normally by a pin, or the ELF code).
Processor ELF Code: The ELF code for this model is: 0x8
| Port Type | Name | Description |
|---|---|---|
| reset | input | Core reset |
| dint | input | Debug external interrupt |
| hwint0 | input | External interrupt |
| hwint1 | input | External interrupt |
| hwint2 | input | External interrupt |
| hwint3 | input | External interrupt |
| hwint4 | input | External interrupt |
| hwint5 | input | External interrupt |
| nmi | input | Non-maskable external interrupt |
| Name | Code | Description |
|---|---|---|
| Int | 0 | |
| Mod | 1 | |
| TLBL | 2 | |
| TLBS | 3 | |
| AdEL | 4 | |
| AdES | 5 | |
| IBE | 6 | |
| DBE | 7 | |
| Sys | 8 | |
| Bp | 9 | |
| RI | 10 | |
| CpU | 11 | |
| Ov | 12 | |
| Tr | 13 | |
| FPE | 15 | |
| Impl1 | 16 | |
| Impl2 | 17 | |
| C2E | 18 | |
| TLBRI | 19 | |
| TLBXI | 20 | |
| MDMX | 22 | |
| WATCH | 23 | |
| MCheck | 24 | |
| Thread | 25 | |
| DSPDis | 26 | |
| Prot | 29 | |
| CacheErr | 30 |
| Mode | Code | Description |
|---|---|---|
| KERNEL | 0 | |
| DEBUG | 1 | |
| SUPERVISOR | 2 | |
| USER | 3 |
The 24KEf SystemC TLM2 Fast Processor Model also has parameters, model commands, and many registers.
The model may also have hierarchy or be multicore and have other attributes and capabilities.
To see this information, please have a look at the model variant specific documents.
Click here to see the detailed document OVP_Model_Specific_Information_mips32_24KEf.pdf.
Information on the 24KEf OVP Fast Processor Model can also be found on other web sites:
www.systemc-cpu-models.org has the page www.systemc-cpu-models.org/mips_models/24kef
www.systemc-models.org has the page www.systemc-models.org/mips_models/24kef
www.ovpworld.org has the library pages http://www.ovpworld.org/library/wikka.php?wakka=CategoryProcessor
www.systemc-processor-models.org has the page www.systemc-processor-models.org/mips_models/24kef
www.systemc-tlm-cpu-models.org has the page www.systemc-tlm-cpu-models.org/mips_models/24kef
www.systemc-tlm-processor-models.org has the page www.systemc-tlm-processor-models.org/mips_models/24kef
Currently available Fast Processor Model Families.