Imperas Accelerates Software Development, Debug and Test for RISC-V Embedded Systems
See Imperas at the Linley Processor Conference 2017, October 4 – 5, 2017, at the Hyatt Regency, Santa Clara, CA. This two-day, dual-track conference, sponsored in part by the RISC-V Foundation, features technical presentations on the latest processors, IP cores, and other technology required for deep learning, servers, communications, embedded, and advanced automotive systems.
Sponsor exhibits and demos include Imperas, demonstrating virtual platforms for RISC-V designs, as part of the RISC-V booth.
When: October 4 – 5, 2017
Where: Hyatt Regency, Santa Clara, CA.
This in-depth technical conference is the industry premier processor event, with over 20 technical presentations by experts from industry-leading companies, and a keynote session covering technology and market trends in processor design.The Linley Processor Conference is targeted at system designers, equipment vendors, OEM/ODMs, service providers, press, and the financial community.
For more information, or to set up meetings with Imperas, please email email@example.com.